Why would I underclock my CPU? Also the assumption that the issues with SMT are actually bugs and not inherent limitations with the architecture itself are somewhat rumors. I've seen details of how the cores are split and basically it's set up in a 3+3 configuration which results in significant latency when switching between cores in the two different packages.
(03-16-2017, 09:30 PM)Enverex Wrote: [ -> ]Why would I underclock my CPU? Also the assumption that the issues with SMT are actually bugs and not inherent limitations with the architecture itself are somewhat rumors. I've seen details of how the cores are split and basically it's set up in a 3+3 configuration which results in significant latency when switching between cores in the two different packages.
IPC Comparison *Clock to Clock*.

(03-16-2017, 08:46 PM)Enverex Wrote: [ -> ]Ryzen does *really* badly in the Dolphin 5 benchmark, see https://forums.dolphin-emu.org/Thread-unofficial-new-dolphin-5-0-cpu-benchmark-results-automatically-updated--45007?pid=438497#pid438497
(03-16-2017, 09:30 PM)Enverex Wrote: [ -> ]Why would I underclock my CPU? Also the assumption that the issues with SMT are actually bugs and not inherent limitations with the architecture itself are somewhat rumors. I've seen details of how the cores are split and basically it's set up in a 3+3 configuration which results in significant latency when switching between cores in the two different packages.
I don't mean to be rude, but did you read any of the earlier posts in this thread? Nearly everything you are saying has already been covered or mentioned...
I missed half the thread somehow. Only noticed after posting initially and seeing other responses above it that I hadn't expected.
More information regarding the infinity fabric that connects the two CCXs.
tl;dr: Ryzen
loves fast memory.
Also, here's a handy diagram I found on the internets that sums up Ryzen's CCX performance quirks quite nicely.
It's worth noting that Raven Ridge APUs are supposedly only a single CCX, and there are rumors that the R3 Ryzen CPUs may in fact by Raven Ridge APUs with the iGPU disabled.
Lastly, it seems like Ryzen may in fact perform a bit faster (~4%) in Dolphin on Windows 7 vs Windows 10 (both of the following systems supposedly had DD4-2666 RAM).
Windows 10: 495 * 3.79095 = 1875 seconds @ 1GHz
Windows 7: 443 * 4.09171 = 1813 seconds @ 1GHz
It's not a good comparison.
1800x @ 4.1 Ghz vs 1700 @ 3.8 Ghz.
Ideally, test them with the same clock...
(03-17-2017, 09:16 AM)DarkHacker Wrote: [ -> ]It's not a good comparison.
1800x @ 4.1 Ghz vs 1700 @ 3.8 Ghz.
Ideally, test them with the same clock...
Hence why I gave the math calculating performance at 1GHz.
Even if the performance doesn't scale linearly with clockrate, the 1800x @ 4.1GHz would have a greater performance penalty than the 1700 @ 3.8GHz; this means running at the same clockrate would actually give a
greater delta than my math does.
(03-15-2017, 12:36 PM)Nintendo Maniac 64 Wrote: [ -> ]It's come to light that Ryzen doesn't like it when some program's threads are split between two CCXs (something that can happen very easily with Windows' core-jumping-happy scheduler), especially in latency-sensitive workloads. In this way, it can be said that 8-core Ryzen performs kind of like a 2-socket CPU system running two 4c/8t CPUs.
Therefore, it may be prudent to retest the Dolphin benchmark(s) with an entire CCX is disabled.
But would me deactivating 4 cores on my 1700 DEFINITELY mean an entire CCX is disabled?
In the same way people are wondering if the 4/6 core chips will run on 1 CCX or 2 can I also 100% assume that disabling 4 cores would make it 1 CCX or it might do 2X2.
I just realized, I don't think the "bcdedit /deletevalue useplatformclock" performance workaround was ever mentioned in this thread...
I'd be interested in seeing how much that effects Dolphin performance, like if it's only a 1-2% difference sort of thing or more like 5-10%.
(03-19-2017, 02:35 PM)Gregtastic Wrote: [ -> ]But would me deactivating 4 cores on my 1700 DEFINITELY mean an entire CCX is disabled?
If you disable the
correct cores, then yes; people have already done tests of this very thing on PC games:
https://www.youtube.com/watch?v=DQilK2dOJTg
(unfortunately, the above video only tested 4+0 with SMT disabled)
(03-19-2017, 02:35 PM)Gregtastic Wrote: [ -> ]In the same way people are wondering if the 4/6 core chips will run on 1 CCX or 2 can I also 100% assume that disabling 4 cores would make it 1 CCX or it might do 2X2.
You don't have to wonder - we already know that they'll both be 3x3 and 2x2 cores per CCX with two CCXs each:
http://www.anandtech.com/show/11202/amd-announces-ryzen-5-april-11th Wrote:We have confirmation from AMD that there are no silly games going to be played with Ryzen 5. The six-core parts will be a strict 3+3 combination, while the four-core parts will use 2+2. This will be true across all CPUs, ensuring a consistent performance throughout.
The only chips with a single CCX should be those based on Raven Ridge.