Nexus 5 Snapdragon 800
It used to run slower then a Snapdragon 600 for no reason other then throttling itself when it wasn't even hot to the touch.
MaJoR Wrote:Well, have you read anything from the period? Take this for example - http://www.anandtech.com/show/858/2 The author actually complains that the GameCube takes an IPC short pipeline approach instead of a long pipeline one!
I don't see any complaints of that nature in the article. He points out that is has a lower clock rate due to the shorter pipeline. Which is objectively true. And then later he demonstrates that xbox cpu is faster and suggests that the lower clock rate of the gecko is a major contributing factor as to why, which again is objectively true.
MaJoR Wrote:The prevailing thought at the time, from everything I've seen, was that IPC was irrelevant when you could just go to higher and higher clocks.
I would have to disagree. Any engineer worth his salt knows that both IPC and clock rate are equally important to performance. This is very well reflected in literature from that time including the article you linked.
MaJoR Wrote:As for leakage, there are many types of leakage, but everything I've read says that they did not expect any leakage to happen as the manufacturing process became smaller. Do you have anything saying otherwise?
Surprisingly....no. Been searching google for 15 minutes now and I haven't found jack squat. But I know it's out there because I've read it before from multiple sources that worked at Intel. I will keep digging when I have time.
(10-13-2015, 03:42 AM)MaJoR Wrote: [ -> ]Honestly, the Pentium 4 wasn't the worst CPU ever. At the time, they thought, why bother with IPC (instructions per clock) when you can just use long pipelines (which reduces IPC but allows higher clockspeeds) and the march of the continually reducing manufacturing processes to push chips to over 10ghz? But as they shrank the architecture to about 90nm, they ran into power leakage, a quantum phenomena that no one even knew about then! Power leakage left the P4 limited to around and under 4ghz, and AMD quickly and easily passed them with much lower clockspeeds, thanks to IPC.
While I don't know about the worst CPU ever, the most what were they thinking CPU ever award goes to the Bulldozer. Because even after Intel was utterly punished by AMD during this period because AMD focused on IPC, and even after Intel switched to an IPC focus after the Pentium 4, not even 5 years later AMD decided to do what the Pentium 4 did! Someone at AMD looked at that failure and went "that's a good idea." Wonko!
Anyway, it's all on wikipedia. I read too much!
https://en.wikipedia.org/wiki/Pentium_4#Microarchitecture
https://en.wikipedia.org/wiki/Leakage_(electronics)#In_semiconductors
No, P4 was worse clusterfuck. It required very expensive RDRAM which works only in pairs.
Most AMDs failings were due being on old manufacturing process.
Rikimaru Wrote:Most AMDs failings were due being on old manufacturing process.
While that is certainly a major contributing factor I would have to disagree. Bulldozer/Piledriver made such minuscule gains over thuban despite a massive increase in transistor count and a die shrink that it's extremely likely that a die shrunken incrementally improved 10H uarch design would have outperformed it significantly. This explains the massive backpedaling that they are doing with the design in Zen.
If Zen has the power and a hex/octo core design and are cheaper then Intel then Intel might be in trouble. But so far its all hot air.