TLB is short for Translation Lookaside Buffer and it's an area of cache in the CPU which is used for virtual address translation. What this means is that when the CPU requests data, it checks the TLB for the physical address of the data. If there's a match then the CPU can very quickly access the data (around 1 clock cycle). However, if there is a miss then it has to work out the physical address which can take up a lot of clock cycles ( around 30 cycles).
Now emulating this part of the hardware would be very detrimental to the program as if I remember correctly, the PPC used in the GC and Wii has a very small TLB which means there would be a lot of misses and the emulator would have to translate a lot of memory addresses. Considering that the GC's CPU had a maximum bandwidth of roughly 1GB/s, that would be a lot of cycles used dedicated just to translating adresses.
Now emulating this part of the hardware would be very detrimental to the program as if I remember correctly, the PPC used in the GC and Wii has a very small TLB which means there would be a lot of misses and the emulator would have to translate a lot of memory addresses. Considering that the GC's CPU had a maximum bandwidth of roughly 1GB/s, that would be a lot of cycles used dedicated just to translating adresses.
"All computers wait at the same speed"
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