Ivy bridge overclocking is disappointing

[bret emerald]

(03-25-2012, 06:54 AM)NaturalViolence Wrote: .....but that makes no sense. Die shrinks usually raise clock rates while overhauls usually lower clock rates, it's been this way for 6 years now.

And sure enough the stock clocks of ivy bridge are higher than sandy bridge while the TDP and power consumption are much lower. I don't see why it would scale so poorly with temperature though, die size certainly isn't the reason.

Yeah I was surprised with the results too. The incresed temps are more likely due to higher levels of resistance/impedance caused by using shorter wires (due to smaller die). Perhaps we've reached a point where the thermal benefits of requiring less voltage are outweighed by the higher electrical resistance. It will be very interesting to see what happens with the move to 14nm, but at least we'll have one more architecture revision to boost performance before then.

Anyway, regardless of the reasons, all testing so far points to one thing.....we're going to have to live with higher temps with ivy bridge.